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TDA7416
CARRADIO SIGNAL PROCESSOR
s s s s s s s s s s s s s
3 STEREO INPUTS 1 PSEUDO DIFFERENTIAL STEREO INPUT VOLUME CONTROL 7 BAND EQUALIZER FILTER CONTROL HIGH PASS FILTER FOR SUBWOOFER APPLICATION DIRECT MUTE AND SOFT MUTE 4 INDEPENDENT SPEAKER OUTPUTS SOFT STEP SPEAKER CONTROL SUBWOOFER OUTPUT WITH SOFT STEP 7 BAND SPECTRUM ANALYZER FULL MIXING CAPABILITY HPF2 WITH ZEROCROSS I2C-BUS INTERFACE
TQFP44 ORDERING NUMBER: TDA7416
DESCRIPTION The device includes a high performance audioprocessor with 7 bands equalizer and spectrum analyzer. The digital control allows a programming in a wide range of all the filter characteristics.
PIN CONNECTION (Top view)
ACOUTSW
ACOUTR
35
ACINSW
AUXL
MDR
AMR
MDL
AML
N.C.
44
43
42
41
40
39
38
37
36
N.C.
34 33 32 31 30 29 28 27 26 25 24 23
Cref
N.C. N.C. AUXR PDL+ PDN.C. PDR+ MIX N.C. GND N.C.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
ACINR ACOUTL ACINL VREFOUT VDD AC2INL AC2OUTL FILOL OUTLF OUTLR N.C.
SDA
SCL
SAIN
MUTE
SAOUT
OUTSW
FILOR
AC2OUT3
AC2INR
OUTRR
OURF
TQFP44
September 2003
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TDA7416
SUPPLY
Symbol VS IS SVRR Parameter Supply Voltage Supply Current Ripple Rejection @ 1kHz VS = 9V Audioprocessor (all Filters flat) Test Conditions Min. 7.5 35 Typ. 9 45 60 Max. 10 55 Unit V mA dB
THERMAL DATA
Symbol Rth j-pins Description Thermal Resistance Junction-pins max Value 65 Unit C/W
ABSOLUTE MAXIMUM RATINGS
Symbol VS Tamb Tstg Operating Supply Voltage Operating Temperature Range Storage Temperature Range Parameter Value 10.5 -40 to 85 -55 to +150 Unit V C C
ESD: All pins are protected against ESD according to the MIL883 standard.
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BLOCK DIAGRAM
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FEATURES Input multiplexer - - - - - 1 pseudo differential CDC stereo input, programmable as single-ended input 3 single-ended stereo inputs Input gain adjust 0 to 15dB with 1dB steps direct mute internal offset-cancellation (autozero)
Mixing stage - mixable mix input to Front speaker outputs - Input controls +15 to -79dB with 1dB steps - direct mute Loudness - programmable center frequency and filter slope - 19dB with 1dB steps - selectable flat-mode (constant attenuation) Volume - +32 to -79.5dB with 0.5dB step resolution - soft-step control with programmable blend times - 100dB range Equalizer - - - - - seven bands 2nd order frequency response center frequency programmable for lowest and highest filter programmable quality factor in four steps for each filter -15 to 15dB range with 1dB resolution
Spectrum analyzer - seven bandpass filters - 2nd order frequency response - programmable quality factor for different visual appearance - analog output - controlled by external serial clock High pass - 2nd order butterworth highpass with programmable cut-off frequency - selectable flat-mode Speaker - 4 independent soft step speaker controls, +15 to -79dB with 1dB steps - mute - 4 independent programmable mix inputs with 50% mixing ratio Subwoofer - single-ended monaural output - independent soft step level control +15 to -79dB with 1dB steps Mute functions - direct mute - digitally controlled SoftMute with 3 programmable mute-times Effect - Gain effect or high pass effect fixed external components
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Table 1. ELECTRICAL CHARACTERISTICS (VS=9V; Tamb=25C; RL=10k; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol INPUT SELECTOR Rin VCL SIN GIN MIN GIN MAX GSTEP VDC Voffset Rin CMRR eNO MLEVEL GMAX AMAX ASTEP ASTEP AMAX fPeak Input Resistance Clipping Level Input Separation Min. Input Gain Max. Input Gain Step Resolution DC Steps Remaining offset with Autozero Input Resistance (see Fig. 1) Common Mode Rejection Ratio Differential VCM = 1VRMS @ 1kHz VCM = 1VRMS @ 10kHz Output-Noise @ Speaker-Outputs 20Hz - 20kHz, flat; all stages 0dB Mixing Ratio Max. Gain Max. Attenuation Attenuation Step Step Resolution Max. Attenuation Peak Frequency fP1 fP2 fP3 fP4 VOLUME CONTROL GMAX AMAX ASTEP EA ET VDC Max. Gain Max. Attenuation Step Resolution Attenuation Set Error Tracking Error DC Steps Adjacent Attenuation Steps From 0dB to GMIN SOFT MUTE AMUTE Mute Attenuation 80 100 dB 0.1 0.5 G = -20 to +20dB G = -80 to -20dB 18 -83 0 -0.75 -4 20 -79 0.5 0 0 22 -75 1 +0.75 3 2 3 5 dB dB dB dB dB dB mV mV Main / Mix-Source 13 -83 0.5 0.5 -21 180 360 540 720 MIXING CONTROL -6/-6 15 -79 1 1 -19 200 400 600 800 17 -75 1.5 1.5 -17 220 440 660 880 dB dB dB dB dB dB Hz Hz Hz Hz 70 46 46 Adjacent Gain Steps GMIN to GMAX DIFFERENTIAL STEREO INPUTS 100 70 60 11 130 k dB dB V all single ended Inputs 70 1.8 80 -1 13 0.5 -5 -10 100 2.2 100 0 15 1 1 1 0.5 1 17 1.5 5 10 130 k VRMS dB dB dB dB mV mV mV Parameter Test Condition Min. Typ. Max. Unit
LOUDNESS CONTROL
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Table 1. ELECTRICAL CHARACTERISTICS (continued) (VS=9V; Tamb=25C; RL=10k; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol TD Parameter Delay Time T1 T2 T3 VTH low VTH high RPU VPU CRANGE ASTEP fC1 fC2 fC3 fC4 fC5 fC6 fC7 Q Low Threshold for SM-Pin Internal pull-up resistor Internal pull-up Voltage Control Range Step Resolution Center Frequency Band 1 Center Frequency Band 2 Center Frequency Band 3 Center Frequency Band 4 Center Frequency Band 5 Center Frequency Band 6 Center Frequency Band 7 Quality Factor fC1a fC1b fC2 fC3 fC4 fC5 fC6a fC6b fC7a fC7b Q1 Q2 Q3 Q4 DCGAIN DC-gain, Band 1 DC = off DC = on, 15dB boost SPECTRUM ANALYZER CONTROL VSAOut fC1 fC2 fC3 fC4 fC5 fC6 fC7 Q fSAClk tSAdel Output Voltage Range Center Frequency Band 1 Center Frequency Band 2 Center Frequency Band 3 Center Frequency Band 4 Center Frequency Band 5 Center Frequency Band 6 Center Frequency Band 7 Quality Factor Clock Frequency Analog Output Delay Time fC1 fC2 fC3 fC4 fC5 fC6 fC7 Q1 Q2 0 55 141 356 0.9 2.26 5.70 14.4 1.62 3.15 1 2 62 157 396 1 2.51 6.34 16 1.8 3.5 3.3 69 173 436 1.1 2.76 6.98 17.6 1.98 3.85 100 kHz s V Hz Hz Hz kHz kHz kHz kHz +14 0.5 55 90 141 365 0.9 2.25 3.6 5.70 13.5 14.4 0.9 1.26 1.62 1.98 -1
1)
Test Condition
Min.
Typ. 0.48 0.96
Max. 1 2 170 1
Unit ms ms ms V V
70
123
High Threshold for SM - Pin
2.5 32 45 3.3 +15 1 62 100 157 396 1 2.51 4 6.34 15 16 1 1.4 1.8 2.2 0 4 +16 1.5 69 110 173 437 1.1 2.76 4.4 6.98 16.5 17.6 1.1 1.54 1.98 2.44 +1 58
k V dB dB Hz Hz Hz Hz kHz kHz kHz kHz kHz kHz
EQUALIZER CONTROL
dB dB
1) The SM-Pin is active low (Mute = 0)
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Table 1. ELECTRICAL CHARACTERISTICS (continued) (VS=9V; Tamb=25C; RL=10k; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol trepeat tintres HPF2 VTH EMAX EMIN ESTEP Rin GMAX AMAX ASTEP AMUTE EE VDC MR VCLIP RL CL ROUT VDC fHP Zero Crossing Threshold Max. Effect Min. Effect Step Resolution Input Impedance Max. Gain Max. Attenuation Step Resolution Output Mute Attenuation Attenuation Set Error DC Steps Mixing Ratio Clipping Level Output Load Resistance Output Load Capacitance Output Impedance DC Voltage Level Highpass corner frequency fHP1 fHP2 fHP3 fHP4 SUBWOOFER ATTENUATOR Rin GMAX AATTN ASTEP AMUTE EE VDC fLP Input Impedance Max. Gain Max. Attenuation Step Resolution Output Mute Attenuation Attenuation Set Error DC Steps Lowpass corner frequency Adjacent Attenuation Steps fLP1 fLP2 fLP3 72 108 144 1 80 120 160 35 14 -83 0.5 80 50 15 -79 1 90 2 5 88 132 176 65 16 -75 1.5 k dB dB dB dB dB mV Hz Hz Hz 4.3 81 122 162 194 30 4.5 90 135 180 215 Adjacent Attenuation Steps Signal/MixIn Thd=0.3% 1.8 2 10 120 4.7 99 148 198 236 0.5 50/50 2.2 1.5 35 13 -83 0.5 80 20 22 4 2 50 15 -79 1 90 3 5 2.5 65 17 -75 1.5 mV dB dB dB k dB dB dB dB dB mV % VRMS k nF V Hz Hz Hz Hz Parameter Spectrum Analyzer Repeat Time Internal Reset Time Test Condition Min. 50 3 Typ. Max. Unit ms ms
SPEAKER ATTENUATORS
AUDIO OUTPUTS
HIGH PASS
SUBWOOFER Lowpass
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Table 1. ELECTRICAL CHARACTERISTICS (continued) (VS=9V; Tamb=25C; RL=10k; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol GENERAL eNO Output Noise BW = 20Hz - 20kHz output muted BW = 20Hz - 20kHz all gains = 0dB single ended inputs S/N Signal to Noise Ratio all gains = 0dB flat; VO = 2VRMS All EQ-bands at +12dB; Q = 1.0 a-weighted; VO = 2.6VRMS d SC distortion Channel Separation left/right VIN = 1VRMS; all stages 0dB VOUT = 1VRMS; Bass & Treble = 12dB 80 3 15 20 103 87 0.01 0.05 90 0.1 0.1 15 V V V dB dB % % dB Parameter Test Condition Min. Typ. Max. Unit
1
DESCRIPTION OF THE AUDIOPROCESSOR PART
1.1 Input stages In the basic configuration one pseudo-differential, three single ended stereo are available. Figure 1. Input-stages
Vref
1
IN1Stereo Pseudo differential Main Selector IN1 IN2 IN3 IN4 Vref Mute InGain
1
IN1+
IN2 Vref
IN3 Vref Vref
IN4 Vref
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+
Vref
Rear Selector IN1 IN2 IN3 IN4 Mute Fader
TDA7416
1.1.1 Pseudo-differential stereo Input (IN1) The IN1-input is implemented as a buffered pseudo-differential stereo stage with 100k input-impedance at each input pin. This input is also configurable as single-ended stereo input . The common input-pin, IN1features a fast charge switch to speed up the charge time of external capacitors.- This switch is released the first time the input-selector data-byte (0) is assessed. 1.1.2 Single-ended stereo Inputs All single ended inputs have an input impedance of 100k. 1.2 AutoZero The AutoZero allows a reduction of the number of pins as well as external components by canceling any offset generated by or before the In-Gain-stage (Please notice that externally generated offsets, e.g. generated through the leakage current of the coupling capacitors, are not canceled). The auto-zeroing is started every time the DATA-BYTE 0 is selected and needs max. 0.3ms for the alignment. To avoid audible clicks the Audioprocessor have to be muted by softmute or hard mute during this time. 1.2.1 AutoZero-Remain In some cases, for example if the P is executing a refresh cycle of the IIC-Bus-programming, it is not useful to start a new AutoZero-action because no new source is selected and an undesired mute would appear at the out-puts. For such applications the TDA7416 could be switched in the AutoZero-RemainMode (Bit 6(I1) of the subad-dress-byte). If this bit is set to high, the DATABYTE 0 could be loaded without invoking the AutoZero and the old adjustment-value remains. 1.3 Loudness There are four parameters programmable in the loudness stage: 1.3.1 Attenuation Figure 2 shows the attenuation as a function of frequency at fP = 400Hz Figure 2. Loudness Attenuation @ fP = 400Hz.
0.0
-5.0
-10.0
dB
-15.0
-20.0
-25.0 10.0
100.0
1.0K
10.0K
Hz
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1.3.2 Peak Frequency Figure 3 shows the four possible peak-frequencies at 200, 400, 600 and 800Hz Figure 3. Loudness Center frequencies @ Attn. = 15dB
0.0
-5.0
dB
-10.0
-15.0
-20.0 10.0
100.0
1.0K
10.0K
Hz
1.3.3 Loudness filter order Different shapes of 1st and 2nd-Order Loudness Figure 4. 1st and 2nd Order Loudness @ Attn. = 15dB, fP=400Hz
0.0
-5.0
dB
-10.0
-15.0
-20.0 10.0
100.0
Hz
1.0K
10.0K
1.3.4 Flat Mode In flat mode the loudness stage works as a 0dB to -19dB attenuator.
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1.4 SoftMute The digitally controlled SoftMute stage allows muting/demuting the signal with a I2C-bus programmable slope. The mute process can either be activated by the SoftMute pin or by the I2C-bus. This slope is realized in a special S-shaped curve to mute slow in the critical regions (see Figure 5). For timing purposes the Bit0 of the I2C-bus output register is set to 1 from the start of muting until the end of de-muting. Figure 5. Soft Mute-Timing
Note: Please notice that a started Mute-action is always terminated and could not be interrupted by a change of the mute -signal.
1.5 SoftStep Volume and Speaker When the speaker-level is changed audible clicks could appear at the output. The root cause of those clicks could either be a DC-Offset before the speaker-stage or the sudden change of the envelope of the audio signal. With the SoftStep-feature both kinds of clicks could be reduced to a minimum and are no more audible. The blend-time from one step to the next is programmable in four steps. Figure 6. SoftStep-Timing for Volume
1dB
0.5dB
SS Time -0.5dB
-1dB
Note: For steps more than 0.5dB (Volume) or 1dB (Speaker) the SoftStep mode should be deactivated because it could generate a hard 1dB step during blending.
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1.6 Equalizer filter There are three parameters programmable in the equalizer filter: 1.6.1 Attenuation Figure 7 shows the boost and cut response as a function of frequency at a center frequency of 1kHz. Figure 7. Equalizer filter control @ fCenter = 1kHz, Q = 1.0
15 dB 10
5
0
-5
-10
-15 20 100 1k
10k
20k Hz
1.6.2 Center Frequency This parameter is programmable in the filter stage 1(62/100Hz), 6(4/6.34kHz) and 7(15/16kHz) only. Figure 8 shows the center frequencies 62, 156, 396, 1000, 2510, 6340 and 15000Hz of the 7 equalizer filters. Figure 8. Center frequencies @ Gain = 15dB, Q = 1.0
16 dB 14
12
10
8
6
4
2
0
-2
10
100
1k
Hz
20k
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1.6.3 Quality Factors Figure 9 shows the four possible quality factors 1, 1.4, 1.8 and 2.2 Figure 9. Quality factors @ boost = 15dB, fCenter = 1kHz
16 dB 14
12
10
8
6
4
2
0
-2 10 100 1k Hz 20k
1.6.4 Superposition of all EQ Filters Figure 10 shows the superposition of all equalizer filter curves for different quality factors. The gain for all filters is +15dB. Figure 10. Superposition of all EQ bands @ boost = 15dB
18 dB 16
14
12
10
8
6
4
2
0 10 100 1k Hz 20k
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1.6.5 DC-mode of equalizer band 1 (62/100 Hz) In this mode, the DC-gain 4dB when set to 15dB boost. Figure 11. EQ band1, normal- and DC-mode @ boost = 15 dB, fCenter = 62 Hz
16 dB 14 12
10
8
6
4
2
0 -1 1 10 100 1K Hz 10K
Note: The center frequency, Q, DC-mode and boost/cut can be set fully independently for each filter.
1.7 Subwoofer Application Figure 12. Subwoofer Application with Lowpass @ 80/120/160Hz and HighPass @ 90/135/180Hz
0.0
-10.0
-20.0
dB
-30.0
-40.0
-50.0 10.0
100.0
Hz
1.0K
10.0K
Both filters, the lowpass- as well as the highpass-filter, have butterworth characteristic so that their cut-off frequen-cies are not equal but shifted by the factor 1.125 to get a flat frequency response.
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1.8 Spectrum analyzer A fully integrated seven band spectrum analyzer with programmable quality factor is present in the TDA7416(Fig. 13). The spectrum analyzer consists of seven band pass filters with rectifier and sample capacitor which stores the maximum peak signal level since the last read cycle. This peak signal level can be read by a microprocessor at the SAout-pin. To allow easy interfacing to an analog port of the microprocessor, the output voltage at this pin is re-ferred to device ground. The microprocessor starts a read cycle with the negative going clock edge at the SAclk input. On the following positive clock edges, the peak signal level for the band pass filters is subsequently switched to SAout. Each analog output data is valid after the time tSAdel. A reset of the sample capacitors is induced whenever SAclk remains high for the time tintres. Note that a proper reset requires the clock signal SAclk to be held at high potential. Figure 13 shows the block diagram and figure 14 illustrates the read cycle timing of the spectrum analyzer. Figure 13. Spectrum analyzer block diagram
Figure 14. Timing spectrum analyzer
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1.9 AC-coupling In some applications additional signal manipulations are desired. For this purpose an AC-coupling is placed before the speaker(fader)-attenuators, which can be activated or internally shorted by I 2C-Bus. In short condition the input-signal of the speaker-attenuator is available at the AC-outputs. The input-impedance of this AC-inputs is 50k . In addition there are Mix inputs available. With this inputs it is possible to mix an external signal to every speaker with a mixing ratio of 50% (see figure 14). The source of front and rear speaker can be set independently. As source is choosable : - internal dc coupling (not recommended) - external ac coupling using ACin pins Figure 15. AC/DC-coupling
ACoutL SWout SWin ACinL
1
1
Vref
Vref Front Fader
left channel
Highpass
fr
flat RearFader
Subwoofe Fader r Lowpass
fr right channel Rear selector
fla t
1.10 Front Speaker-Attenuator and Mixing A Mixing-stage is placed after front speaker-attenuator and can be set independently to mixing-mode. Having a full volume for the Mix-signal the stage offers a wide flexibility to adapt the mixing levels. Figure 16. Output Selector
Front Volume +15/-79dB 1dB step Highpass2 OutF
1
25k
From M I Xin
Volume +15/-79dB 1dB step
1.11 Audioprocessor Testing During the Testmode, which can be activated by setting bit I2 of the subaddress byte and D0 of the audioprocessor testing byte, several internal signals are available at the Mix pin. During this mode the input resistance of 100kOhm is disconnected from the pin. The internal signals available are shown in the Databyte specification.
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25k
TDA7416
2 I2C BUS INTERFACE
2.1 Interface Protocol The interface protocol comprises: -a start condition (S) -a chip address byte (the LSB bit determines read / write transmission) -a subaddress byte -a sequence of data (N-bytes + acknowledge) -a stop condition (P)
CHIP ADDRESS MSB LSB S 1 0 0 0 1 1 0 R/W ACK MSB T AZ SUBADDRESS LSB MSB A ACK DATA 1...DATA n LSB DATA ACK P
I
A
A
A
A
S = Start R/W = "0" -> Receive-Mode (Chip could be programmed by P) "1" -> Transmission-Mode (Data could be received by P) ACK = Acknowledge P = Stop MAX CLOCK SPEED 500kbits/s 2.1.1 Auto increment If bit I in the subaddress byte is set to "1", the auto increment of the subaddress is enabled. 2.1.2 TRANSMITTED DATA (send mode)
MSB X X X X X X X LSB SM
SM = Soft mute activated X = Not Used The transmitted data is automatically updated after each ACK. Transmission can be repeated without new chip address. 2.1.3 Reset Condition A Power-On-Reset is invoked if the Supply-Voltage is below than 3.5V. After that, the following data is written automatically into the registers of all subaddresses:
MSB 1 1 1 1 1 1 1 LSB 0
The programming after POR is marked bold-face / underlined in the programming tables. With this programming all the outputs are muted to VREF (VOUT= VDD/2).
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2.2 SUBADDRESS (receive mode)
1MSB I2 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 I1 I0 A4 A3 A2 A1 LSB FUNCTION A0 Audioprocessor Testmode off on AutoZero Remain off on Auto-Increment Mode off on Subaddress Source Selector Loudness Volume EQ Filter 1 (62/100Hz) EQ Filter 2 (157Hz) EQ Filter 3 (396Hz) EQ Filter 4 (1kHz) EQ Filter 5 (2.51kHz) EQ Filter 6 (4/6.34kHz) EQ Filter 7 (15/16kHz) Mixing Programming SoftMute Subwoofer / Spectrum analyzer / HighPass Configuration Audioprocessor I Mixing Level Control Speaker attenuator LF Speaker attenuator RF Speaker attenuator LR Speaker attenuator RR Subwoofer attenuator Testing Audioprocessor
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2.3 DATA BYTE SPECIFICATION The status after Power-On-Reset is marked bold-face / underlined in the programming tables. 2.3.1 Input Selector (0)
MSB D7 D6 D5 D4 D3 D2 X X X X 0 0 : 1 1 0 1 0 0 : 1 1 0 0 : 1 1 0 1 : 0 1 D1 0 0 1 1 LSB FUNCTION D0 0 1 0 1 Source Selector BUS/PD AUX MD AM/FM Input Gain 0dB 1dB : 14dB 15dB Mute off on
2.3.2 Loudness (1)
MSB D7 D6 D5 D4 0 0 : 0 0 : 1 : 0 0 1 1 0 1 0 1 0 1 D3 0 0 : 1 1 : 0 : D2 0 0 : 1 1 : 0 : D1 0 0 : 1 1 : 1 : LSB FUNCTION D0 0 1 : 0 1 : 1 : Attenuation 0 dB -1 dB : -14 dB -15 dB : -19 dB not allowed Center Frequency 200Hz 400Hz 600Hz 800Hz Loudness Order First Order Second Order
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2.3.3 Volume (2)
MSB D7 0 0 : 0 0 0 : 0 0 0 : 1 1 D6 0 0 : 0 0 0 : 0 1 1 : 1 1 D5 0 0 : 0 0 0 : 1 0 0 : X X D4 0 0 : 1 1 1 : 1 0 0 : 1 1 D3 0 0 : 1 1 1 : 1 0 0 : 1 1 D2 0 0 : 0 0 0 : 1 0 0 : 1 1 D1 0 0 : 0 0 1 : 1 0 0 : 1 1 LSB ATTENUATION D0 0 1 : 0 1 0 : 1 0 1 : 0 1 Gain/Attenuation (+32.0dB) (+31.5dB) : +20.0dB +19.5dB +19.0dB : +0.5dB 0.0dB -0.5dB : -79.0dB -79.5dB
Note: It is not recommended to use a gain more than 20dB for system performance reason. In general, the max. gain should be limited by software to the maximum value, which is needed for the system. 2.3.4 Equalizer (3,4,5,6,7,8,9)
MSB D7 D6 D5 D4 0 0 : 0 0 1 1 : 1 1 0 0 1 1 0 1 0 1 0 1 0 1 D3 0 0 : 1 1 1 1 : 0 0 D2 0 0 : 1 1 1 1 : 0 0 D1 0 0 : 1 1 1 1 : 0 0 LSB FUNCTION D0 0 1 : 0 1 1 0 : 1 0 Equalizer cut/boost level -15dB -14dB : -1dB 0dB 0dB +1dB : +14dB +15dB Equalizer Q-Factor 2.2 1.8 1.4 1.0 Equalizer Center Frequency (only Subaddresses 3,8,9) 62Hz(addr 3)/4kHz(addr 8)/15kHz(addr 9) 100Hz(addr 3)/6.24kHz(addr 8)/16kHz(addr 9) DC mode EQ Band 1 (62/100 Hz, Subaddress. 4!) on off
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2.3.5 Mixing Programming (10)
MSB D7 D6 D5 D4 D3 D2 D1 LSB FUNCTION D0 0 1 0 0 1 1 0 1 0 1 0 1 0 1 X X 0 1 0 1 Mixing Mute enable Rear Source Selector BUS'(PD) AUX MD AM/FM Mixing Target Speaker LF off Speaker LF on Speaker RF off Speaker RF on ZeroCross on HPF2 on off Spectrum Analyzer Detect Point After EQ Before EQ
2.3.6 SoftMute & HPF2 (11)
MSB D7 D6 D5 D4 D3 D2 D1 LSB FUNCTION D0 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 1 1 X X X 0 0 1 1 0 0 1 1 X 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 X SoftMute On (Mute) Off SoftMute Time Mute time = 0.48ms Mute time = 0.96ms Mute time = 123ms Secondary High Pass Enable Filter available No Filter (Gain) Secondary High Pass effect (with ZeroCross) 4 dB 6 dB 8 dB 10 dB 12 dB 14 dB 16 dB 18dB 20dB 22dB 0dB
Note: It is recommended to set D3(Filter available or not) during initial mute.
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TDA7416
2.3.7 Subwoofer Configuration / Spectrum Analyzer / HighPass (12)
MSB D7 D6 D5 D4 D3 D2 D1 0 0 1 1 X X 0 1 0 1 0 0 1 1 0 1 0 1 0 1 LSB D0 0 1 0 1 Subwoofer Filter off 80Hz 120Hz 160Hz Subwoofer Coupling AC using SWIn pin DC Spectrum Analyzer Q-Factor 3.5 1.8 High Pass Enable Filter off Filter on High Pass Cut-Off-Frequency 90Hz 135Hz 180Hz 225Hz FUNCTION
2.3.8 Configuration Audioprocessor I (13)
MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 0 1 0 1 0 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 PD Input Mode single ended pseudo differential PD Input Gain -6 dB 0 dB SoftStep Volume off on SoftStep Time 320s 1.28ms 5.12ms 20.4ms Loudness flat filter ON Front AC Speaker AC coupling (ACin) DC coupling Rear effect No effect signal Equalizing signal FUNCTION
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TDA7416
2.3.9 Mixer Level Control (14)
MSB D7 1 1 1 0 0 : 0 0 : 0 0 X D6 0 : 0 0 0 0 : 0 0 : 1 1 1 D5 0 : 0 0 0 0 : 0 0 : 0 0 1 D4 0 : 0 0 0 0 : 0 1 : 0 0 X D3 1 : 0 0 0 0 : 1 0 : 1 1 X D2 1 : 0 0 0 0 : 1 0 : 1 1 X D1 1 : 0 0 0 0 : 1 0 : 1 1 X LSB ATTENUATION D0 1 : 1 0 0 1 : 1 0 : 0 1 X Gain/Attenuation +15dB : + 1dB 0dB 0dB - 1dB : -15dB -16dB : -78dB -79dB Mute
2.3.10Speaker and Subwoofer Level Control (15,16,17,18,19)
MSB D7 D6 0 : 0 0 0 0 : 0 : 0 : 1 : 1 : 1 1 0 1 D5 0 : 0 0 0 0 : 1 : 1 : 0 : 0 : 0 1 D4 0 : 0 0 1 1 : 0 : 1 : 0 : 1 : 1 X D3 1 : 0 0 0 0 : 0 : 0 : 0 : 0 : 1 X D2 1 : 0 0 0 0 : 0 : 0 : 0 : 0 : 1 X D1 1 : 0 0 0 0 : 0 : 0 : 0 : 0 : 1 X LSB ATTENUATION D0 1 : 1 0 0 1 : 0 : 0 : 0 : 0 : 1 X Gain/Attenuation +15dB : + 1dB 0dB 0dB - 1dB : -16dB : -32dB : -48dB : -64dB -79dB Mute SoftStep On/Off On Off
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TDA7416
2.3.11Testing Audioprocessor (20)
MSB D7 D6 D5 D4 D3 D2 D1 LSB FUNCTION D0 0 1 0 1 0 1 0 1 X 0 1 X X X 0 1 0 1 0 1 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 1 1 1 0 0 0 1 1 0 0 1 1 0 0 1 0 0 1 0 1 Audioprocessor Testmode off on Test-Multiplexer Spectrum Analyzer Filter 62Hz Spectrum Analyzer Filter 157Hz Spectrum Analyzer Filter 396Hz Spectrum Analyzer Filter 1kHz Spectrum Analyzer Filter 2.51kHz Spectrum Analyzer Filter 6.34kHz Spectrum Analyzer Filter 16kHz Switch-Ron measurement setup (Level input) not used 200kHz Oscillator NB-Hold internal Reference Clock external internal AZ Function off on SC-Clock Fast Mode Normal Mode
Note: This byte is used for testing or evaluation purposes only and must not set to other values than "11111110" in the application!
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TDA7416
Figure 17. Application Diagram
IN2L
IN 3R
IN 3L
IN 4R
IN4L
A CoutSW
A CoutR
44
43
42
41
40
39
38
37
36
35
1
34
33
2
32
A CoutL
IN 2R
3
31
IN 1 L+
4
30
VREFout
IN !-
5
29 +V S1
6
28
AC2I nL -9
IN 1 R+
7
27
AC2OutL
MIX
8
26
FI LOL
9
25
OutLF
10
24
OutLR
11
23
12
13
14
15
16
17
18
19
20
21
SD A
SC L
SACLK SMute SAOut
SW Out
FI LORA C2OutR AC2I nR OutRR
OutRF
22
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TDA7416
DIM. MIN. A A1 A2 B C D D1 D3 e E E1 E3 L L1 K 0.45 0.05 1.35 0.30 0.09
mm TYP. MAX. 1.60 0.15 1.40 0.37 1.45 0.45 0.20 12.00 10.00 8.00 0.80 12.00 10.00 8.00 0.60 1.00 0.75 0.018 0.002 0.053 0.012 0.004 MIN.
inch TYP. MAX. 0.063 0.006 0.055 0.014 0.057 0.018 0.008 0.472 0.394 0.315 0.031 0.472 0.394 0.315 0.024 0.039 0.030
OUTLINE AND MECHANICAL DATA
TQFP44 (10 x 10)
0(min.), 3.5(typ.), 7(max.)
D D1 A A2 A1
33 34 23 22
0.10mm .004 Seating Plane
E1
B
44 1 11
12
E
B
C
e
L
K
TQFP4410
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TDA7416
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners (c) 2003 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States www.st.com
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